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A design can pass at typical corners and still miss its yield in real silicon. Find that after tapeout and you're paying for a re-spin. VarMan runs variation and yield analysis on analog, library and memory designs, so the miss shows up while you can still change the design. Brute-force Monte Carlo can take millions or billions of runs to answer that. A memory bit-cell may need checking to 7 sigma and beyond. VarMan gets there up to 30X faster, because machine learning and statistical sampling pick the cases worth simulating.
Seven analyses, validated on FinFET and FDSOI technology at advanced nodes. Your edition decides which ones you get: VarMan Analog, VarMan Library or VarMan Memory, with the XMA option on Memory.
What a full classical Monte Carlo run would tell you, at up to 30X the speed. You set the accuracy target.
On a 28 nm bulk CMOS VCO, 587 VarMan runs stood in for the 50,000 Monte Carlo runs requested.
Performance limits: name the sigma you need and get the performance limits that hold at that yield. It takes few simulations, even when the design has more than one failure zone.
Yield estimation: set a performance limit and get the yield out to 4–6 sigma and beyond from a small run count. You also see the process conditions behind each parametric fail.
High Sigma Spread: one operation maps a cell's yield from low sigma to high. Your power, performance and area trade-offs rest on the full distribution. It stays accurate on the non-linear, non-Gaussian distributions advanced nodes produce.
Variability eXplorer: you set the simulation budget. It finds where the design turns marginal, from 3 sigma up to high sigma. Then it names the corners and parameters driving it.
True corner extraction: out of every possible PVT combination, it finds the few statistical corners that decide whether you reach a given yield. You simulate those and skip the rest.
Local variability analysis: shows which transistors local variation hits hardest, from a small number of runs. It copes with a very large parameter count. Those transistors are your hotspots.
Keep your simulator. VarMan works with any golden SPICE simulator and design environment, and with transistor-level simulators whether they're third-party or proprietary. Results and waveforms open in the golden viewers you already use. The GUI follows a load-and-analyze model, and a simulation manager spreads jobs across LSF, SGE, OGE and Slurm clusters.
Utilities: VarMan Bench sweeps temperatures, sub-circuits and parameter values in one batch; DK Qualifier covers design kit support; the Calculator converts a sigma level into equivalent Monte Carlo runs, with its confidence interval.
Your design, its model set and a golden SPICE simulator, whether that's a third-party tool or Silvaco's own SmartSpice
Yield figures, the failing samples behind them, and waveforms.
Chung-Chun Chen, Director of Analog Design, on porting the IP supplier's designs across 12 foundries. Simulation runs on SmartSpice, Silos and Variation Manager.
All seven analyses and the three editions. Worked examples run from a 28 nm VCO to FinFET and 28 nm bit cells at 5.2 and 5.4 sigma.
Statistical functional verification for standard-cell libraries, shown on a 28 nm FDSOI flip-flop and a 40-cell digital library.
How XMA runs Monte Carlo across an entire memory instead of a slice, with an 8K × 80-bit SRAM example.
Vincent Annezo, VarMan corporate application engineer, on the new GUI and algorithm changes, shaped by years of customer feedback.
How machine learning was adapted to EDA's limits: scarce, noisy data, short projects and growing variation at advanced nodes. Silvaco tools serve as the examples.
Why 6- and 7-sigma memory verification takes too many simulations done the traditional way, and the VarMan analyses that cut them.
Finding 3-sigma corners and running 6-sigma verification on a standard-cell library without the usual simulation count.
Where regular Monte Carlo runs out for analog designers, and how VarMan speeds up analog cells and AMS and RF ICs.
Why FinFET, FDSOI and lower Vdd/Vth processes made Monte Carlo routine, and VarMan's sampling techniques for analog, memory and standard cells.
Bring a cell, its model set and the sigma it has to reach. Then talk through its variation and yield analysis with an engineer who knows VarMan.
Variation-aware design means checking that a circuit meets its specification across the process variation real silicon brings, rather than at typical corners alone. FinFET, FDSOI and lower supply and threshold voltages made heavy Monte Carlo use routine. Brute force costs time and simulation licenses, and VarMan cuts both.
High-sigma analysis checks that a design still meets spec at very rare failure rates, 4 to 6 sigma and beyond. You need it wherever a cell repeats many times over: memory bit-cells can call for 7 sigma or more, which brute-force Monte Carlo would need billions of simulations to reach. VarMan estimates that yield from a limited run count.
VarMan combines machine learning with statistical algorithms and sampling strategies. Instead of spreading simulations evenly, it concentrates them on the samples close to failure. You get the result classical Monte Carlo would give, at the same accuracy and up to 30X the simulation performance.
VarMan isn't tied to one simulator or design environment. Bring your golden SPICE simulator, third-party or proprietary, or run it with Silvaco's SmartSpice, and your existing flow stays as it is. Waveforms and results go to your golden viewers, and large jobs can run on LSF, SGE, OGE or Slurm clusters.
True corner extraction identifies the process, voltage and temperature settings behind the statistical corners most likely to deliver a target yield. Only those corners get simulated, not every PVT combination. On a 90 nm embedded-flash design, 3-sigma corner verification dropped from 142,000 SPICE runs to 422.
VarMan analyzes individual cells and circuits with Monte Carlo, high-sigma, corner and sensitivity analyses. The XMA option, an add-on to VarMan Memory, analyzes the yield of the entire memory instead of extrapolating from a slice or critical path. Underneath, VarMan's fast Monte Carlo and high-sigma engines find the fails and estimate yield quickly.