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Expert: hierarchical analog layout editor for mixed-signal and RF ICs

Analog layout, checked against design rules while you draw it. The editor opens designs larger than 10 GB in minutes.

Talk to our Technical Experts Documentation

What Expert does

Expert is Silvaco’s hierarchical IC layout editor for analog, RF, mixed-signal and digital work. You draw at any angle. Design rules are checked as you edit, so a spacing error shows up while you can still move the polygon, not at sign-off. It runs on Linux and Windows.

Capabilities

The layout errors that cost most are the ones found after the layout looks finished. Expert runs rule checks and connectivity checks while you’re still editing.

  • Editing and capacity

    Set up the interface, hotkeys and toolbars the way your team works. Script the steps you repeat, and share libraries across everyone on the project. Edit a cell in place inside its hierarchy, explode it, or work on flattened data, in as many windows as the job needs.

    Multimillion-transistor designs load, pan and zoom quickly, even on an ordinary workstation.

  • Interactive verification

    DRC Assist checks the rules you switch on during each edit. It flags a violation with its measured value, and you fix it on the spot. While you draw a wire, it shows that wire’s resistance.

    Click any shape and Node Probing highlights everything electrically connected to it. The short locator traces power-to-ground shorts. You can compare two layouts against each other, and browse SmartDRC/LVS errors without leaving the editor.

  • Automation

    Drive layout from a netlist, and build parameterized cells from JavaScript or Silvaco’s LISA scripting language instead of drawing each variant by hand.

    Any-angle rulers keep measurements accurate on non-Manhattan geometry, and equal-resistance routing handles TFT and flat-panel interconnect.

  • Technology support

    CMOS, BiCMOS, GaAs and other processes all run in Expert. Start from one of its custom PDKs or an iPDK, and check your foundry’s PDK before you evaluate.

    If you already run Virtuoso, your technology-file setup can start from that information.

  • Formats

    Expert reads and writes GDSII, LEF/DEF, DXF, OASIS, CIF, Applicon, OpenAccess databases, .eld and .sld.

    Encryption keeps your own IP, and IP you license from third parties, protected inside the layout.

Works with

Layout sits between the schematic and sign-off, so the tools on either side matter as much as the editor.

Takes in

A schematic, a netlist or an existing layout database.

  • Gateway: schematic-driven layout, with cross-probing between schematic and layout
  • A netlist, for netlist-driven layout
  • An existing GDSII database, or OASIS, LEF/DEF and OpenAccess data

Hands off to

Silvaco verification and extraction, plus Calibre for third-party sign-off.

  • SmartDRC/LVS: physical verification, with errors browsed inside Expert
  • Hipex: parasitic extraction, back-annotated to the schematic netlist
  • Victory RCx: 3D field-solver RC extraction from the manufacturing side, whose solvers also run inside Expert as Hipex-FS
  • Calibre Interactive, Calibre RealTime and Calibre RVE, when sign-off DRC and LVS run in Calibre

Applications

  • Analog and mixed-signal layout Hierarchical custom layout, driven from a Gateway schematic
  • RF layout All-angle polygons for RF and microwave elements, inductors included
  • Digital blocks Netlist-driven layout built from standard cells
  • TFT and flat panel design Equal-resistance and equal-length routing, fan-shaped connections and routing along a curve

Proof and resources

  • CustomerJanuary 2019

    Silicon Creations

    An analog and mixed-signal IP supplier with IP in production from 7 to 180 nm. Its most advanced FinFET design flow uses Expert alongside Gateway and SmartView.

    “We took advantage of Silvaco’s custom capabilities, including Expert’s flexible scripting and are continuing to push the next generation process technology with upcoming designs using Silvaco’s products.”

    Randy Caplan, co-founder, Silicon Creations

  • Product brief · PDF

    Expert layout editor

    The datasheet: editing and all-angle features, capacity, schematic-driven layout, Pcells, and how it works with Calibre, Virtuoso data and Hipex.

  • Presentation · PDFJune 2022

    Expert layout editor

    DRC Assist, Node Probing, layout comparison, the Gateway, SmartDRC, Hipex and Victory RCx integrations, flat-panel features and the cross-section viewer.

  • Application note · PDF2020

    Expert’s Calibre RVE interface for DRC and LVS

    Launching Calibre DRC and LVS from Expert, in batch or through Calibre Interactive, and highlighting the errors back in the layout.

  • Application note · PDF2020

    Netlist-driven layout with standard cells

    Preparing your own standard cell layouts for netlist-driven layout from Gateway, so net information passes from schematic to layout.

  • Application note · PDF2022

    Custom PCell evaluators in Expert OA

    OpenAccess Pcells in Expert’s OA mode: the bundled PyCell evaluator, and how to use the evaluator a PDK requires instead.

Browse the 23 Expert examples All analog custom design application notes

See your own layout in Expert

Bring the questions an analog layout evaluation turns on. Does your GDSII or OpenAccess data open cleanly? Does your Virtuoso technology setup carry over? Which PDK covers your foundry and node? Put them to our engineers first.

Talk to our Technical Experts Documentation Support and Downloads

Questions about Expert

An IC layout editor is where a chip’s physical geometry gets drawn: the shapes on each mask layer that become transistors, wires and contacts. In analog layout it’s also where design rules and parasitics start to bite. Expert is Silvaco’s layout editor, hierarchical and all-angle, used for digital blocks as well as analog, mixed-signal and RF circuits.

Yes, if you have one. Expert can build its technology file from your existing Virtuoso information and import layers, colors, stipples, hotkeys, macros and toolbars directly. Nobody rebuilds the layer map by hand, and your layout designers start in surroundings they know.

Expert reads and writes GDSII, OASIS, OpenAccess, LEF/DEF, CIF, DXF and Applicon, plus the .eld and .sld formats, and it supports OpenAccess iPDKs. A layout can also start from a netlist, or from a Gateway schematic that stays linked to it for cross-probing.

Interactive DRC checks design rules while the layout is being drawn, not in a separate run afterwards. In Expert, DRC Assist takes its rules from the technology file and reports each violation with the numbers behind it. It also recognizes shapes sitting in lower cells of the hierarchy, so you can correct errors before moving on.

Yes. Launch Calibre DRC and LVS from inside Expert, either as a batch job or through Calibre Interactive, then highlight each error in your layout from Calibre RVE. Calibre RealTime adds sign-off quality DRC on demand, though the Calibre interface is Linux-only.

Yes. Pcells can be scripted in JavaScript or in LISA, Silvaco’s own scripting language. They also drive Expert’s netlist-driven and schematic-driven layout. In OpenAccess mode Expert runs OpenAccess Pcells too, with a bundled evaluator for Python-based PyCells or whichever one your PDK calls for.

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