What is SPICE model extraction?

Deriving the compact model parameters that make a simulated device behave like the real one. You measure or simulate the device, then fit a standard model — BSIM, HiSIM, PSP — to that data until it reproduces it. The fitted parameters are what a circuit simulator actually reads.

Which compact models does Utmost IV support?

BSIM-CMG, BSIM4 and BSIM6, HiSIM, PSP, RF models, power MOSFET models, macromodels and Verilog-A models. Device architectures run from multi-finger through FinFET and GAAFET to emerging structures. If your model is not on that list, the Verilog-A and macromodel routes are how it gets covered.

Can Utmost IV extract models from TCAD simulation instead of measured silicon?

Yes, and that is the point of running it beside TCAD. The optimisers work from simulated characteristics as readily as from measured devices, so you can extract a usable compact model before the first wafer exists — then re-extract against real silicon when it arrives, using the same templates.

Which SPICE simulators can use the extracted models?

SmartSpice, HSPICE, Eldo, Spectre, LTspice and QSPICE, and the models drop into Cadence, Synopsys and Mentor design environments. Verification runs through a multi-threaded SmartSpice interface before release, so the model is checked in a simulator rather than only in the extraction tool.

Which measurement instruments does Utmost IV support?

The instrument drivers are open architecture, which matters more than any list: you can modify a shipped driver or write one for a measurement device we have never seen. High-speed acquisition engines sit behind them. Tell us what is on your bench and we will tell you what driving it takes.

How does Utmost IV fit into PDK development?

It produces the models the PDK ships. The workflow runs design of experiments to choose what to measure, extraction to fit the model, then statistical analysis and corner validation so the kit carries corners rather than a single nominal device. Foundries use it to build and maintain kits; fabless teams use it to check them.

Utmost IV: device modeling and SPICE model extraction

Utmost IV builds the compact models your circuit team simulates with, from device data you measured on the bench or simulated in TCAD.

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What Utmost IV does

Utmost IV measures or simulates device characteristics and extracts the SPICE compact models that circuit designers and PDKs depend on, from BSIM-CMG and BSIM4 through HiSIM and PSP. It fits each model from a pre-configured template and checks the result across process corners before anything reaches a design kit. It's the device modeling step between your TCAD work and your circuit team's simulations.

Device modeling capabilities

Data acquisition

High-speed acquisition engines run the measurement for you, so characterization is a scripted job rather than sweeps set by hand. The drivers are open architecture. Edit the ones Silvaco ships, or build one for whatever instrument sits on your bench.
Extraction

Every supported model type starts from a pre-configured template with physics-driven initial parameter estimates, so the fit begins close to the answer. AI and machine-learning optimizers work alongside eight mathematical ones, from Levenberg-Marquardt and Hooke-Jeeves to particle swarm and Gaussian process. Feed them TCAD results or measured devices. Silvaco puts model creation at minutes where it used to take weeks.
Model library

BSIM-CMG, BSIM4 and BSIM6, HiSIM and PSP, plus RF, power MOSFET and reliability models. The library reaches multi-finger, FinFET and GAAFET devices as well as emerging architectures. When no standard model describes your device, write it in Verilog-A or build a macromodel.
Workflow

Design of experiments decides which measurements are worth your time. Extraction follows, then statistical analysis and corner validation, with reliability, aging and temperature checks in the same pass. When the process moves, you iterate the model instead of starting over.
Verification and deployment

A multi-threaded SmartSpice interface puts every model through a full SPICE simulation before release, so the fit is tested in a simulator as well as in the tool that produced it. Your designers can use it in SmartSpice, HSPICE, Eldo, Spectre, LTspice or QSPICE, inside a Cadence, Synopsys or Mentor environment. Utmost IV itself runs on premises, on HPC clusters or in the cloud, on Windows or Linux.

Where it sits in the TCAD flow

Victory Process builds the structure and Victory Device solves it. Utmost IV turns that result, or your measured silicon, into a model a circuit simulator can read.

Characteristics Measured silicon, or simulated from Victory Device
Utmost IV Extracts and verifies the compact model
SmartSpice and third-party SPICE simulators For circuit simulation
PDKs For design enablement

Who runs Utmost IV

Proof and resources

Read any of it without an account.

CustomerJune 24, 2025

Fraunhofer ISIT

Uses Victory TCAD, Utmost IV and SmartSpice together as a DTCO flow for GaN and MEMS work on 8-inch wafers, through its part in the EU Chips Act's APECS pilot line.

“Especially during our current development of high voltage lateral and vertical GaN devices based on engineering substrates … we see many physical effects that require accurately calibrated process and device models.”

Michael Mensing, Ph.D., Head of the Advanced Devices Group
CustomerMay 6, 2025

Excelliance MOS

Adopted a DTCO flow of Victory TCAD and Utmost IV for its silicon carbide power devices, with Utmost IV automating the electrical measurements and extracting the SPICE models.

“With Silvaco’s DTCO flow combining Victory TCAD and UTMOST IV, we can simulate, analyze, and refine device performance … helping us bring innovative power solutions to market more rapidly.”

Fermi Liu, Director of R&D Department
Published paperFebruary 2013

A Sequential Model Parameter Extraction Technique for Physics-Based IGBT Compact Models

Dondee Navarro, Takeshi Sano and Yoshiharu Furui, all Silvaco engineers. IEEE Transactions on Electron Devices, Vol. 60, Issue 2, pp. 580–586. A step-by-step method for extracting the parameters of physics-based IGBT compact models.

Application examples

Application notes

Product briefs

Published papers

Masataka Miyake, Dondee Navarro, Uwe Feldmann, Hans Juergen Mattausch, Takashi Kojima, Takaoki Ogawa and Takashi Ueta, "HiSIM-IGBT: A Compact Si-IGBT Model for Power Electronic Circuit Design," IEEE Transactions on Electron Devices, Vol. 60, Issue 2, pp. 571–579, Feb. 2013
Dondee Navarro, Takeshi Sano and Yoshiharu Furui, "A Sequential Model Parameter Extraction Technique for Physics-Based IGBT Compact Models," IEEE Transactions on Electron Devices, Vol. 60, Issue 2, pp. 580–586, Feb. 2013
Isato Ogawa, Tomoharu Yokoyama and Mutsumi Kimura, "Simulation of neural network using ferroelectric capacitor," IEICE Technical Report Vol. 117 No. 372, No. 373, Dec. 2017

Webinars

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Evaluating Utmost IV

Bring one device's measurements, or TCAD results if there's no silicon yet, and tell us which model type you need.
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Device modeling questions

SPICE model extraction gives a circuit simulator the parameter set it needs to reproduce a real device. You gather the data by measurement or simulation, then tune a standard model such as BSIM, HiSIM or PSP until its curves match. The design team receives the parameters, not the raw data.

BSIM-CMG, BSIM4 and BSIM6, HiSIM, PSP, RF models, power MOSFET models and reliability models, along with macromodels and Verilog-A. Multi-finger, FinFET and GAAFET devices are in scope, as are emerging architectures, so an unusual structure doesn't leave you without a model.

Yes. Point the optimizers at simulated characteristics from Victory Device and you get a compact model before any silicon exists. When wafers come back, re-extract against the measurements with the same templates and compare the two to see how close the simulation was.

SmartSpice, HSPICE, Eldo, Spectre, LTspice and QSPICE, and the models load into Cadence, Synopsys and Mentor design environments. Whichever you use, the model has already run in SmartSpice before it reached your design, so you aren't the first to simulate it.

Any instrument you can write a driver for, because the drivers are open architecture rather than a closed list of supported hardware. Your team can adapt an existing driver to new equipment, and the acquisition engines handle the measurement run. Tell our Technical Experts which instruments you use and they'll say what the driver work involves.

It produces the models a PDK ships, with statistical and corner variants rather than a single nominal device. Foundries and IDMs build and maintain kits with it. Fabless teams use it to check design assumptions against the models they're given.

Utmost IV: device modeling and SPICE model extraction

What Utmost IV does

Device modeling capabilities

Data acquisition

Extraction

Model library

Workflow

Verification and deployment

Where it sits in the TCAD flow

Who runs Utmost IV

Proof and resources

Fraunhofer ISIT

Excelliance MOS

A Sequential Model Parameter Extraction Technique for Physics-Based IGBT Compact Models