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Display TFT simulation: from pixel device development to full panel design

A panel is millions of copies of one pixel device, and Silvaco follows that device from TFT simulation to the layout, extraction and verification of the full panel.

Talk to our Technical Experts Read the display technology overview (PDF)

The pixel and the panel usually sit with different teams

Display development starts with one thin-film transistor or emitter and ends with a panel ready for manufacturing. OLED and microLED emitters, CMOS and TFT backplanes, flexible and stretchable substrates: each changes how the pixel device behaves. And every change has to hold up across the whole array.

Device engineers characterize the transistor. Panel designers take the array through capture, layout, extraction and verification, often in point tools from several vendors. You lose time at every handoff between the two. Eight of the world's ten biggest display makers already do their device work in Silvaco TCAD.

One flow from the TFT to the signed-off panel

Your device team and your panel team work from the same models. What TCAD predicts for the TFT is what your panel simulation runs on.

  1. Your pixel design TFT, emitter and pixel circuit
  2. Victory Process Builds the TFT and emitter structures
  3. Victory Device Solves their device physics
  4. Utmost IV Extracts TFT compact models
  5. SmartSpice Runs pixel circuit design on the four-terminal TFT model
  6. SmartSpice Pro Simulates the full panel
  7. Expert Lays out pixels, with equal-resistance routing and fan-shaped connections
  8. Hipex Pulls parasitics out of one cell or the whole panel
  9. SmartDRC/LVS Signs off the layout at cell and panel level

Technologies and devices

Whichever backplane and emitter you're weighing, the same tools cover it at device level and at panel level. Much of that toolset was written for display work and nothing else. Its proprietary functions take cost and time out of getting a panel to market.

  • Technologies

    OLED, microLED and microOLED emitters, on backplanes built in CMOS or TFT.

    Flexible and stretchable substrates as well, with the bending stress on each device modeled in simulation.

  • Device simulation

    Process modeling and emulation build the structure. Drift-diffusion simulation solves it for a-Si, LTPS and IGZO TFTs and bulk CMOS. Bump and tail density-of-states modeling comes with it, along with mobility models specific to polysilicon and amorphous materials, and bending stress, hydrogen and grain effects.

    Emitters cover LED, OLED, microLED and microOLED. Add a proprietary mobility model with self-heating, reverse ray tracing and TFT electrical stress effects. You run the device experiment before a wafer ever sees it.

  • Device modeling

    Choose from a wide set of TFT compact models: Silvaco's proprietary four-terminal TFT model, and the RPI amorphous-silicon, polysilicon and universal organic TFT models.

    Utmost IV extracts their parameters with several optimization algorithms, so the extraction strategy is yours to pick. Flat panel teams lean hard on Verilog-A parameter extraction, and it handles that too.

  • Design and layout

    Device Explorer puts each device's basic characteristics in the circuit schematic, where you can try them in simulation straight away. DRC assist, edit-in-place, connectivity highlighting, a short locator, layout versus layout and a cross-sectional viewer sit alongside.

    Panel geometry has its own set in Expert: equal-resistance router, route along curve, pixel with frame, fan-shaped connections, clone wires and slot wires.

  • Panel-level verification

    Hipex extracts parasitics fast and accurately for one cell or the whole panel, and SmartSpice Pro simulates the circuit at both scales.

    Image retention and sticking get their own image quality features in SmartSpice. Then SmartDRC/LVS runs high-speed, high-accuracy physical verification, cell by cell and across the full panel.

Applications

Each one asks something different of the pixel.

Read further on TFTs, OLEDs and panels

TFT modeling, pixel-array simulation, OLED optics and liquid crystal on silicon, worked through in Silvaco webinars and Simulation Standard papers.

More on display development

Read the Simulation Standard

Stuck on the TFT, the emitter or the panel?

Silvaco's display specialists already work alongside display manufacturers on problems like yours. Bring the one that's costing you time. You'll talk to someone who knows the panel as well as the tool.

Talk to our Technical Experts Documentation Support and Downloads

TFT and panel simulation, answered

Everything between a single pixel-level device and a panel ready for manufacturing. TCAD simulates each TFT and emitter, and compact models carry that behavior into SPICE, where the panel is laid out, extracted, simulated and verified, cell first and whole array after. Silvaco covers both ends in one flow.

TFT simulation in Silvaco TCAD covers amorphous silicon, LTPS and IGZO TFTs alongside bulk CMOS backplanes, with density-of-states, mobility and stress models, and self-heating in oxide TFTs. At circuit level, customers already use the four-terminal TFT model for amorphous silicon, polysilicon, organic and metal-oxide TFTs, including LTPS, LTPO and flexible displays.

Many TFTs in production have four terminals, and a three-terminal compact model can only approximate one. Modeling teams end up building workarounds, and design teams inherit the approximation. Silvaco's proprietary four-terminal TFT model describes the device as it actually is, which gives both teams more room to work.

You simulate the pixel cell first, then the whole array. Parasitics are extracted at cell and full-panel scale, the RC elements are back-annotated into the netlist, and a fast SPICE simulator runs the panel as one circuit. Physical verification then checks the layout at those same two scales.

Dynamic effects in the TFTs cause it, hysteresis above all, and conventional SPICE models don't capture them. Silvaco's flex modeling reproduces those effects in SPICE. Your design team sees retention and sticking on the pixel circuit and can design them down before a panel is built.

Yes. Flexible and stretchable substrates are among the display technologies Silvaco supports, and device simulation models the bending stress on each TFT alongside hydrogen and grain effects. Silvaco has also published webinars on TCAD for flexible displays and on choosing the right material for one.

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