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Foundry, PDK, semiconductor IP and EDA partners

New tools and IP only help if they fit the process and flow you've already committed to. That's what Silvaco's foundry, IP, EDA and standards relationships are for. Check your foundry's PDK, semiconductor IP coverage on your node, or where Silvaco fits in the EDA flow you run today.

Check foundry and PDK support Apply to become a partner

What each partnership means for your design

  • 7

    Foundry partners

    Foundry relationships are behind the PDKs Silvaco tools run on and the processes our IP covers.

    • ams AG
    • GlobalFoundries
    • ON Semiconductor
    • TSMC
    • Tower Semiconductor
    • UMC
    • X-FAB
    Find your foundry's PDK

    Running a fab? See Foundry Services

  • 3

    EDA partners

    Silvaco tools that work inside a Cadence, Siemens EDA or Synopsys flow, not in a parallel one.

    See how it fits your flow

  • 5 IP · 1 design services

    IP and design services partners

    Chipmakers and memory suppliers Silvaco works with on IP, plus a design services firm. NXP's FlexCAN controller, for example, is licensed as an IP block.

    • AP Memory
    • Dialog Semiconductor (a Renesas company)
    • NXP
    • Texas Instruments
    • Winbond
    • design services: HDL Design House
    See recent partner work

  • 8

    Standards and industry groups

    Three standards bodies whose specs your models and interface IP depend on, plus five industry networks.

    See the memberships

Silvaco inside the flow you already run

Nobody rips out a working Cadence, Siemens EDA or Synopsys flow to try one tool. You don't have to. Silvaco partners with all three, and its tools handle the files those flows produce: netlists, layout databases, parasitic views and SPICE models.

Where in your flow Silvaco tool Works with
Circuit simulation SmartSpice Runs HSPICE and Spectre netlists and models, with matching analyses and results
Custom layout Expert Reads and writes GDSII, OASIS, LEF/DEF and OpenAccess; imports existing Virtuoso technology data; supports OpenAccess iPDKs; works with Calibre Interactive and Calibre RVE during physical verification
Post-layout parasitic reduction Jivaro Pro DSPF, SPEF, SPICE and CalibreView parasitic netlists, plus OpenAccess extracted views, whichever extraction and simulation tools you use
SPICE model extraction Utmost IV Models for Eldo, HSPICE, LTspice, QSpice, SmartSpice and Spectre

Planning a flow review? Talk to our Technical Experts

HSPICE and Spectre are registered trademarks of Synopsys and Cadence Design Systems respectively; Calibre is a registered trademark of Siemens EDA. Named here to state compatibility, not affiliation beyond the partnerships above.

Standards and industry groups

Three of these groups set standards your models, design data and interface IP rely on. The rest are industry networks Silvaco belongs to.

  • Compact Model Coalition

    Sets the standard compact transistor models that circuit simulators and foundry PDKs share. Utmost IV extracts several of them, including BSIM-CMG, BSIM4, HiSIM and PSP.

  • Silicon Integration Initiative (Si2)

    Maintains shared design-data standards, including OpenAccess, which the Expert layout editor reads and writes.

  • MIPI Alliance

    Mixel has been a member since 2006. The D-PHY, C-PHY, CSI-2 and DSI IP you license is built to the specifications this group maintains.

  • Automotive Electronic Systems Innovation Network

    UK network linking carmakers with the automotive electronics supply chain.

  • Chinese American Semiconductor Professional Association

    Professional network for semiconductor engineers and executives.

  • GaN Consortium

  • Global Semiconductor Alliance

    Industry association for fabless chip companies and the foundries they build with.

  • SEMI ESD Alliance

    The SEMI community for electronic system design companies, EDA and IP vendors among them.

Recent work with our partners

  1. Dassault Systèmes Press release

    Partnership to advance first-time-right semiconductor manufacturing

    The two companies are building connected digital twin workflows so you get process development right first time, ramp yield faster and decide before fab resources are committed.

    Read more

  2. NVIDIA Press release

    Physics-based digital twins on NVIDIA AI and accelerated computing

    Silvaco is building its physics-based digital twin work for semiconductor design and manufacturing on NVIDIA’s AI and accelerated computing platform.

    Read more

  3. TSMC Press release

    Mixel MIPI C-PHY/D-PHY combo IP available on TSMC N2P

    Mixel is now part of Silvaco, so this is Silvaco Design IP on a TSMC process. The combo IP supports MIPI D-PHY v3.6 with embedded clock mode.

    Read more

Partner with Silvaco

Run a foundry, license IP, offer design services or build tools your customers use next to ours? A partnership is a trade, and you should see both sides of it before you apply.

Start a partner inquiry

New to Silvaco? Read about the company

Checking a node, or proposing a partnership?

Name your foundry and process, and Silvaco will reply.

Check foundry and PDK support Start a partner inquiry

Node not listed? Talk to our Technical Experts

PDK and foundry questions

A process design kit (PDK) is the file set a foundry releases for one manufacturing process: device models, design rules, verification decks and layout building blocks. Your design tools read it, so what you draw matches what the fab can build. Silvaco supplies foundry-specific PDKs for its custom analog design tools, plus generic and demonstration kits, and lists a sample on the Process Design Kits page.

PDK, semiconductor IP and tool support each vary by process node, so check yours by node rather than by foundry name. Silvaco's foundry partners are ams AG, GlobalFoundries, ON Semiconductor, TSMC, Tower Semiconductor, UMC and X-FAB. Separately, Mixel IP is silicon-proven on 13 nodes at 9 foundries.

Foundries certify a specific tool or IP version on a specific process, so the question that matters is whether yours is covered. Talk to our Technical Experts with your target node and they'll confirm its status.

It may already be. Mixel, now part of Silvaco, has built MIPI PHYs since 1998, and its interface IP is silicon-proven on 13 nodes at 9 foundries. The cores are designed to be foundry-agnostic, so ask about your node on the Silvaco Design IP page even if it's not among the nine.

Start a partner inquiry with a short note on what you build and which processes or flows you work in.