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VarMan XMA runs memory yield analysis on the entire memory, with your golden SPICE simulator doing the work. At full size that's normally impractical. So the usual workaround simulates a slice or a critical path and projects the result. The projection is where the error comes from. Fast SPICE trades accuracy for runtime, and combining per-block sigma corners can produce a yield the silicon doesn't match.
The whole memory, held to the accuracy you'd expect from a single-cell run.
Banks, word-line drivers, local I/O, logic and the controller all go into the run. XMA assembles the memory from those blocks in minutes, then simulates all of it.
VarMan's Fast Monte Carlo and high-sigma kernels, applied to the whole memory for fast-fail detection and yield estimation. Failures surface up to 100X faster than with classical Monte Carlo analysis.
Verified on FinFET, FDSOI and planar CMOS foundry processes. XMA runs alongside the golden SPICE simulator in your flow.
Set up and run the analysis from a graphical interface. Results show the statistical spread behind each yield estimate. You can read them without a statistician on the team.
You keep your design and your simulator. XMA changes how much of the memory they cover.
A memory design and a golden SPICE simulator. The reference-accuracy simulator your team already trusts.
VarMan, the base product. XMA is an option to VarMan Memory and runs on VarMan's analysis kernels.
Where a slice-based estimate costs you the most.
Check the numbers yourself.
CEA-Leti chose VarMan XMA for fail detection and yield estimation on a 256 Kb ultra-low-voltage, ultra-low-leakage SRAM. The project planned to test its predictions against silicon from STMicroelectronics' 28 nm UT-FDSOI process.
The SRAM case in numbers. An 8K × 80-bit memory, 100K instances (65,536M equivalent runs), 10,000 simulations, two failures found.
What each VarMan edition analyzes, including the three analyses the XMA option brings to VarMan Memory.
Dr. Jean Baptiste Duluc shows how VarMan's tools, XMA among them, cut the simulation count for high-sigma memory characterization.
Send us a memory design and the yield target it has to hit. An application engineer runs XMA on it with you and walks you through the result for the full memory.
Memory yield analysis predicts how many manufactured memories will meet spec once process variation is counted in. Because the same bit-cell repeats across the whole array, even a one-in-a-billion failure rate matters. CEA-Leti's XMA project set out to test whether rates that low still guarantee acceptable yield for SRAMs above a megabyte.
A slice or critical path leaves most of the memory unsimulated, so the yield figure is extrapolated, and the error can be significant. Fast SPICE cuts runtime at the cost of accuracy, and block-by-block sigma corners can combine into an unrealistic result. XMA simulates the whole rebuilt memory with golden SPICE instead.
An option. VarMan XMA gives VarMan Memory three analyses that span the entire memory: XMA Monte Carlo, XFail analysis and yield verification. They run on the same analysis kernels as base VarMan, which remains the tool for variation work on individual cells and blocks.
Three foundry technology families: planar CMOS, FinFET and FDSOI. In 2019, CEA-Leti announced a project applying XMA to a 256 Kb ultra-low-power SRAM, with measured 28 nm UT-FDSOI silicon from STMicroelectronics as the check on its predictions. For a node outside those families, our technical experts can tell you where it stands.
Yes. XMA works with the golden SPICE circuit simulators used across the industry, so the full memory runs at reference accuracy rather than through a Fast SPICE approximation. Name the simulator your flow depends on, and we'll confirm the setup before you scope an evaluation.
The build takes minutes, and XMA then keeps the simulation count small. In one SRAM run, 10,000 simulations covered 100,000 instances of an 8K × 80-bit memory, equal to 65,536M individual runs, and found two failures. You get a full-memory yield figure without simulating every instance one by one.